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The F1 Implementation
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The exact details of the F1 implementation are not yet all nailed down, but
here are some of the basics:
- x86 emulation - this will most likely be contained in an associated ROM, and
is primarily meant to allow booting with a commodity x86 motherboard (and
hence some amount of x86 BIOS code to execute), but could likely also be
used to run programs not yet available natively for the F architecture.
- Packaging - Celeron-style Slot 1 package; this allows L1-cache and BIOS to
be included with the CPU, and there will likely be many Celeron owners who
wish to upgrade. ;)
- Or possibly socket 7 style. Or maybe both... Join us
and help us decide!